Computer Engineering Engineering

13 个科学问题 · 工程技术 Engineering

本页目录

什么是“RISC”与“CISC”?二者设计哲学有何不同?

What are RISC and CISC, and how do their design philosophies differ?

RISC(精简指令集)采用固定长度、少而规整的指令,靠load/store与大量寄存器并易于流水化,如 ARM、RISC-V。CISC(复杂指令集)指令功能强、长度可变、寄存器较少且多靠微程序,如 x86;现代 x86 内部仍解码为微操作,二者走向融合。
RISC uses a small, regular, fixed-length instruction set with load/store and many registers that pipelines easily, e.g., ARM and RISC-V. CISC has powerful, variable-length instructions, fewer registers, and microcode, e.g., x86; modern x86 still decodes to micro-operations, so the two converge.
难度 专业 · 适合 高中(15-18) CC BY 4.0 · 已核验 · Verified 2026-11-02
来源 · Source

ACM/IEEE;Hennessy & Patterson《计算机体系结构:量化研究方法》

ACM/IEEE; Hennessy & Patterson, 'Computer Architecture: A Quantitative Approach'

#RISC #CISC #指令集 #微操作

芯片制造中的『光刻』是怎样把电路『画』到硅片上的?

How does 'photolithography' print circuits onto a silicon wafer?

光刻先在硅片涂光敏光刻胶,用掩模版遮挡后曝光,使受光区域化学性质改变,再经显影去掉相应部分,露出图案,随后刻蚀或掺杂把图形转移到下层。它是决定芯片集成度的关键工艺。
Lithography coats the wafer with photosensitive resist, exposes it through a mask, develops away the changed parts to reveal a pattern, then etches or dopes to transfer it. It sets how densely chips can be integrated.
难度 专业 · 适合 高中(15-18) CC BY 4.0 · 已核验 · Verified 2026-08-23 · 2 条独立证据
来源 · Source

David Macaulay,《The Way Things Work》,Houghton Mifflin,1988;中译《万物运转的秘密》

D. Macaulay, The Way Things Work, Houghton Mifflin, 1988; Chinese ed.

#光刻 #掩模 #硅片

计算机里的『缓存』为什么能加快速度?

Why does a computer's 'cache' speed things up?

缓存是靠近处理器的小容量高速存储器,存放近期或即将用到的数据,避免频繁访问慢速主存。处理器先查缓存,命中即可极快取得,从而整体提速。
Cache is a small fast memory near the processor holding recently or soon-needed data, avoiding slow main-memory trips. The CPU checks cache first; a hit is extremely fast, speeding the whole system.
难度 进阶 · 适合 初中(12-15) CC BY 4.0 · 已核验 · Verified 2026-08-23 · 2 条独立证据
来源 · Source

David Macaulay,《The Way Things Work》,Houghton Mifflin,1988;中译《万物运转的秘密》

D. Macaulay, The Way Things Work, Houghton Mifflin, 1988; Chinese ed.

#缓存 #存储器 #速度

什么是 CPU 流水线(pipelining)?它为何能提高吞吐率?

What is CPU pipelining, and why does it raise throughput?

流水线把一条指令的执行拆成取指、译码、执行、访存、写回等多个阶段,使多条指令在不同阶段重叠执行。吞吐率因此提高,尽管单条指令的延迟不变;冒险(hazard)会造成停顿。
Pipelining splits instruction execution into stages such as fetch, decode, execute, memory, and write-back so multiple instructions overlap in different stages. Throughput rises even though a single instruction's latency is unchanged; hazards can cause stalls.
难度 进阶 · 适合 高中(15-18) CC BY 4.0 · 已核验 · Verified 2026-11-03
来源 · Source

ACM;Hennessy & Patterson《计算机体系结构:量化研究方法》

ACM; Hennessy & Patterson, 'Computer Architecture: A Quantitative Approach'

#流水线 #指令级并行 #冒险 #吞吐率

什么是缓存(cache)的“命中”与“未命中”?为何采用多级缓存?

What are cache hit and miss, and why use multiple cache levels?

缓存存放 CPU 近期将用到的数据:命中时直接从缓存取数(很快),未命中时则需到更慢的存储器取数并填入缓存。多级缓存(L1/L2/L3)在速度、容量与成本之间折中,越靠近 CPU 的级别越小越快。
A cache holds data the CPU will likely use soon: on a hit it is served fast, on a miss the data must be fetched from slower memory and loaded into cache. Multi-level caches (L1/L2/L3) trade off speed, size, and cost, with closer levels smaller and faster.
难度 进阶 · 适合 初中(12-15) CC BY 4.0 · 已核验 · Verified 2026-10-04
来源 · Source

Patterson & Hennessy《计算机组成与设计》

Patterson & Hennessy, 'Computer Organization and Design'

#缓存 #命中率 #多级缓存 #局部性

并行计算为什么能更快完成任务?

Why can parallel computing finish tasks faster?

并行计算把大问题拆成可同时处理的子任务,由多个处理器核心一起算,相当于多人协作。适合大规模仿真、渲染和机器学习,但受任务依赖和通信开销限制。
Parallel computing splits a problem into subtasks run at once on many cores—like teamwork. It suits big simulations, rendering, and ML but is limited by dependencies and communication overhead.
难度 进阶 · 适合 初中(12-15) CC BY 4.0 · 已核验 · Verified 2026-08-23 · 2 条独立证据
来源 · Source

David Macaulay,《The Way Things Work》,Houghton Mifflin,1988;中译《万物运转的秘密》

D. Macaulay, The Way Things Work, Houghton Mifflin, 1988; Chinese ed.

#并行 #多核 #加速

什么是“冯·诺依曼架构”?其核心思想是什么?

What is the von Neumann architecture, and what is its central idea?

冯·诺依曼架构是一种存储程序计算机:指令与数据存放在同一存储器中,经同一总线由 CPU 取指、译码、执行。其核心是“程序即数据”,局限在于 CPU 与存储器速度差距造成的“冯·诺依曼瓶颈”。
The von Neumann architecture is a stored-program computer where instructions and data share the same memory and bus, and the CPU fetches, decodes, and executes them sequentially. Its core is that programs are data, and its limitation is the von Neumann bottleneck from the CPU-memory speed gap.
难度 进阶 · 适合 高中(15-18) CC BY 4.0 · 已核验 · Verified 2026-10-04
来源 · Source

电气电子工程师协会计算机学会(IEEE Computer Society);Patterson & Hennessy《计算机组成与设计》

IEEE Computer Society; Patterson & Hennessy, 'Computer Organization and Design'

#冯诺依曼架构 #存储程序 #总线 #瓶颈

什么是嵌入式系统,和我们日常电脑有何不同?

What is an embedded system, and how does it differ from a PC?

嵌入式系统是嵌入到设备内部、为特定功能服务的专用计算机,如微波炉、汽车ECU、智能手表。它资源有限、常实时运行、不追求通用,而电脑是通用平台。
An embedded system is a dedicated computer inside a device for one task—microwaves, car ECUs, watches. It is resource-limited, often real-time, and not general-purpose like a PC.
难度 进阶 · 适合 初中(12-15) CC BY 4.0 · 已核验 · Verified 2026-08-23 · 2 条独立证据
来源 · Source

David Macaulay,《The Way Things Work》,Houghton Mifflin,1988;中译《万物运转的秘密》

D. Macaulay, The Way Things Work, Houghton Mifflin, 1988; Chinese ed.

#嵌入式 #实时 #专用

网络的『带宽』和『时延』有什么区别?

What is the difference between network 'bandwidth' and 'latency'?

带宽是一段时间内能传输的数据量上限(如每秒多少兆),决定『多快能灌满』;时延是单个数据包从发到收的往返时间,决定『反应多灵敏』。两者共同影响体验。
Bandwidth is the max data rate over time (e.g., Mbps), setting how fast you can fill the pipe; latency is the round-trip time of a packet, setting responsiveness. Both shape the experience.
难度 进阶 · 适合 初中(12-15) CC BY 4.0 · 已核验 · Verified 2026-08-23 · 2 条独立证据
来源 · Source

David Macaulay,《The Way Things Work》,Houghton Mifflin,1988;中译《万物运转的秘密》

D. Macaulay, The Way Things Work, Houghton Mifflin, 1988; Chinese ed.

#带宽 #时延 #网络

FPGA这类芯片有什么特别之处?

What is special about an FPGA chip?

FPGA(现场可编程门阵列)的内部逻辑可在出厂后由用户重新配置,像用硬件搭积木实现并行电路。它开发灵活、上市快,常用于原型验证、通信和信号处理。
An FPGA's internal logic can be reprogrammed by the user after manufacture, wiring up parallel hardware like building blocks. It is flexible and fast to market, used in prototyping, comms, and signal processing.
难度 进阶 · 适合 初中(12-15) CC BY 4.0 · 已核验 · Verified 2026-08-23 · 2 条独立证据
来源 · Source

David Macaulay,《The Way Things Work》,Houghton Mifflin,1988;中译《万物运转的秘密》

D. Macaulay, The Way Things Work, Houghton Mifflin, 1988; Chinese ed.

#FPGA #可编程 #硬件

计算机为什么用0和1(二进制)来表示一切?

Why do computers represent everything with 0s and 1s (binary)?

电子电路最容易稳定地区分两种状态(如高/低电平、通/断),用二进制只需处理『是/否』两种信号,抗干扰强、制造简单,所以所有数据最终都编码成0和1。
Circuits most reliably tell two states apart (high/low, on/off); binary needs only yes/no signals—robust against noise and simple to build—so all data ends up as 0s and 1s.
难度 入门 · 适合 大众 CC BY 4.0 · 已核验 · Verified 2026-08-23 · 2 条独立证据
来源 · Source

David Macaulay,《The Way Things Work》,Houghton Mifflin,1988;中译《万物运转的秘密》

D. Macaulay, The Way Things Work, Houghton Mifflin, 1988; Chinese ed.

#二进制 #逻辑 #电平

什么是“摩尔定律”?它描述了什么趋势?

What is Moore's law, and what trend does it describe?

摩尔定律是戈登·摩尔1965年的观察:单块芯片上的晶体管数约每两年翻一番,推动计算能力指数增长。如今受物理与散热极限制约,这一增速已放缓。
Moore's law is Gordon Moore's 1965 observation that the number of transistors on a chip doubles roughly every two years, driving exponential growth in computing power. It has now slowed due to physical and thermal limits.
难度 入门 · 适合 大众 CC BY 4.0 · 已核验 · Verified 2026-11-02
来源 · Source

电气电子工程师协会(IEEE);G. Moore《电子学》1965

IEEE; G. Moore, 'Cramming more components onto integrated circuits,' Electronics, 1965

#摩尔定律 #晶体管 #集成电路 #指数增长

CPU和GPU在设计思路上有什么不同?

How do CPUs and GPUs differ in design philosophy?

CPU核心少但每个很强,擅长串行、复杂的逻辑任务;GPU有成千上万个小核心,擅长把同一种计算并行铺开,因此特别适合图形渲染和人工智能训练。
A CPU has few powerful cores for serial, complex logic; a GPU has thousands of small cores that parallelize the same task, suiting graphics and AI training.
难度 入门 · 适合 大众 CC BY 4.0 · 已核验 · Verified 2026-08-23 · 2 条独立证据
来源 · Source

David Macaulay,《The Way Things Work》,Houghton Mifflin,1988;中译《万物运转的秘密》

D. Macaulay, The Way Things Work, Houghton Mifflin, 1988; Chinese ed.

#CPU #GPU #并行