芯片制程从7nm到3nm，为什么晶体管要用“鳍式FinFET”甚至“环栅GAA”结构来保住漏电控制？
From 7 nm to 3 nm, why must transistors use FinFET or even gate-all-around (GAA) structures to control leakage?
晶体管越缩越短，栅极越来越难关住沟道电流，出现短沟道效应导致漏电和发热。FinFET 用竖起的鳍让栅极三面贴沟道，GAA 更进一步用纳米片把沟道四面裹住，重新夺回控制力。
As transistors shrink, the gate struggles to switch off the channel, causing short-channel leakage and heat. FinFET wraps the gate on three sides of a raised fin; GAA goes further, surrounding a nanosheet channel on all sides to regain control.
难度 专业 · 适合 大众
CC BY 4.0 · 来源待核验 · Source pending review
来源 · Source
出处备注：著录含书名，但缺版次 / 出版社 / 年份中的一部分，需编辑补全后才能做独立比对。
Ferain、Colinge & Colinge，《多栅晶体管》，《自然·材料》9卷，713页（2010）
Ferain, Colinge & Colinge, 'Multigate transistors,' Nat. Mater. 9, 713 (2010)
#FinFET #GAA #短沟道效应
先进封装（如Chiplet/3D封装）为什么被视为延续“摩尔定律”的新路径？
Why is advanced packaging (e.g. Chiplet / 3D packaging) seen as a new path to extend Moore's Law?
当单芯片微缩越来越难且贵，Chiplet 把不同功能的小芯片用高密度互连拼在一起，等效算力继续涨而良率更高。3D 堆叠则靠硅通孔把芯片叠高，缩短互连、提升带宽。
As single-chip scaling gets hard and pricey, Chiplets link function-specific dies with dense interconnects for rising compute at better yield. 3D stacking uses through-silicon vias to pile chips, shortening links and boosting bandwidth.
难度 专业 · 适合 大众
CC BY 4.0 · 来源待核验 · Source pending review
来源 · Source
出处备注：作者 / 书名 / 版次 / 出版社 / 年份齐备，仅缺独立比对证据；已在可信度报告单列披露，不再重复核验。
Lau，《芯粒设计与异构集成》（Springer, 2023）
Lau, J., 'Chiplet Design and Heterogeneous Integration' (Springer, 2023)
#先进封装 #Chiplet #硅通孔
极紫外（EUV）光刻为什么需要锡等离子体的极短波长光源，普通光源为什么做不到？
Why does EUV lithography need an extreme short-wavelength source from tin plasma, and why can ordinary light sources not do it?
要把电路刻到几纳米，必须用波长约13.5纳米的极紫外光，没有天然材料能透射它，只能用多层钼硅镜反射。光源靠用激光轰击锡液滴产生高温等离子体发射，整套系统极其复杂昂贵。
Patterning nanometer circuits needs about 13.5 nm EUV light that no material transmits, so multilayer Mo-Si mirrors reflect it. The source fires lasers at tin droplets to make hot plasma, making the whole system hugely complex and costly.
难度 专业 · 适合 大众
CC BY 4.0 · 来源待核验 · Source pending review
来源 · Source
出处备注：著录含书名，但缺版次 / 出版社 / 年份中的一部分，需编辑补全后才能做独立比对。
Porter & Levinson，《极紫外光刻》（第2版，SPIE, 2018）
Porter & Levinson, 'EUV Lithography' (2nd ed., SPIE, 2018)
#EUV #光刻 #锡等离子体
什么是“良率”，为什么一条先进芯片产线哪怕只有少量缺陷也会让整片晶圆报废很多？
What is yield, and why do even a few defects on an advanced line scrap many dies on a whole wafer?
良率是能正常工作的芯片占全部芯片的比例。先进制程一颗纳米级灰尘颗粒就能毁掉一个晶粒，而一片晶圆上有上千个小芯片，所以洁净度和工艺稳定性直接决定赚钱还是亏本。
Yield is the fraction of working chips. A single nanometer particle can kill one die, and a wafer holds thousands of tiny dies, so cleanliness and process stability decide profit or loss.
难度 进阶 · 适合 大众
CC BY 4.0 · 已核验 · Verified 2026-11-02
来源 · Source
May & Spanos，《半导体制造与过程控制基础》（2006）
May & Spanos, 'Fundamentals of Semiconductor Manufacturing and Process Control' (2006)
独立核验依据 · Independent verification: 核验依据 1 OPENLIBRARY 标识 /works/OL5836278W：Fundamentals of semicon
#良率 #晶圆 #缺陷
芯片工作时为什么要拼命“散热”，温度太高会发生什么？
Why must chips be cooled so hard, and what happens if they get too hot?
几十亿晶体管挤在指甲盖大小里，功耗变成大量热，温度一高漏电流飙升、会自动降频甚至烧毁。散热片、风扇和液冷就是把这团热带走，保住性能和寿命。
Tens of billions of transistors pack into a fingernail, turning power into heat; high temperature spikes leakage, triggers throttling or burnout. Heatsinks, fans and liquid cooling carry that heat away to protect performance and life.
难度 入门 · 适合 大众
CC BY 4.0 · 已核验 · Verified 2026-11-03
来源 · Source
Incropera，《传热学基础》（第7版）
Incropera, 'Fundamentals of Heat and Mass Transfer' (7th ed.)
独立核验依据 · Independent verification: 核验依据 1 OPENLIBRARY 标识 /works/OL2975219W：Fundamentals of heat an
#芯片散热 #漏电流 #降频
为什么做芯片要用“沙子”里的硅，又要在无菌无尘的超级干净房间里生产？
Why is silicon from sand used for chips, and why must they be made in super-clean dust-free rooms?
硅是半导体，能精确控制导电与否，是做开关的理想材料。但电路细到头发丝万分之一，一粒灰尘落上去就能让线路断掉，所以车间要比手术室还干净。
Silicon is a semiconductor whose conductivity can be precisely controlled, ideal for tiny switches. But circuits are a ten-thousandth of a hair wide, so one dust speck can break a line—hence cleaner-than-operating-room factories.
难度 入门 · 适合 小学低段(6-8)
CC BY 4.0 · 已核验 · Verified 2026-11-02
来源 · Source
May & Spanos，《半导体制造与过程控制基础》（2006）
May & Spanos, 'Fundamentals of Semiconductor Manufacturing and Process Control' (2006)
独立核验依据 · Independent verification: 核验依据 1 OPENLIBRARY 标识 /works/OL5836278W：Fundamentals of semicon
#硅 #无尘室 #半导体