当晶体管缩到原子尺度，量子隧穿为什么会让“关不掉”的漏电流变严重？
As transistors reach atomic scales, why does quantum tunneling make 'off' leakage worse?
栅极和沟道之间的绝缘薄层薄到几个原子时，电子有一定概率直接“穿墙”过去，不再受开关控制。这种隧穿电流随厚度指数增长，是继续微缩的物理天花板之一。
When the insulating layer between gate and channel is only a few atoms thick, electrons can tunnel straight through it regardless of the switch. That tunneling current grows exponentially as it thins — a hard floor for shrinking.
难度 专业 · 适合 大众
CC BY 4.0 · 已核验 · Verified 2026-10-03
来源 · Source
S. M. Sze 与 Kwok K. Ng 著《Physics of Semiconductor Devices》（半导体器件物理）
S. M. Sze & Kwok K. Ng, Physics of Semiconductor Devices
独立核验依据 · Independent verification: 核验依据 1 ISBN 9780470068328
#隧穿 #量子 #绝缘薄层
摩尔定律本质上遇到的，是量子力学瓶颈还是热力学瓶颈？
Is Moore's Law fundamentally hitting a quantum-mechanics limit or a thermodynamics limit?
两者都有。量子隧穿让“关断”越来越难（量子极限），而每一次开关都要耗散能量、产生热，散热跟不上就烧坏芯片（热力学极限）。所以瓶颈既是物理的，也是能量的。
Both. Tunneling makes 'off' harder (quantum limit), while every switch dissipates energy as heat and cooling can't keep up (thermodynamic limit). The wall is physical and energetic at once.
难度 专业 · 适合 大众
CC BY 4.0 · 已核验 · Verified 2026-11-03
来源 · Source
Gordon E. Moore, 《Cramming More Components onto Integrated Circuits》, Electronics 38(8) (1965)
Gordon E. Moore, 'Cramming More Components onto Integrated Circuits', Electronics 38(8) (1965)
独立核验依据 · Independent verification: 核验依据 1 OPENLIBRARY 标识 /works/OL13379258W：Cramming more componen
#摩尔定律 #热耗散 #极限
晶体管是怎么工作的？
How does a transistor work?
双极型晶体管由三层半导体（npn 或 pnp）构成，基极微小电流即可控制集电极-发射极大电流，实现放大与开关。Bardeen、Brattain 与 Shockley 于 1947 年发明点接触晶体管，开启了微电子时代。
A bipolar transistor is three semiconductor layers (npn or pnp); a small base current controls a much larger collector-emitter current, enabling amplification and switching. Bardeen, Brattain and Shockley invented the point-contact transistor in 1947, launching microelectronics.
难度 专业 · 适合 高中(15-18)
CC BY 4.0 · 已核验 · Verified 2026-10-03
来源 · Source
Bardeen、Brattain、Shockley 1947 年专利；Sze《半导体器件物理》
Bardeen, Brattain & Shockley (1947); Sze, Physics of Semiconductor Devices
独立核验依据 · Independent verification: 核验依据 1 ISBN 9780470068328
#晶体管 #半导体 #放大
为什么芯片工厂要在比手术室还干净的无尘室里造电路，却仍难免“缺陷”？
Why build chips in cleaner-than-surgery cleanrooms, yet defects still happen?
因为最细的线条只有几个纳米，一粒落到上面的灰尘就是一座“山”，会让电路断线。即使层层过滤，残余分子和光刻本身的统计涨落也会留下少量缺陷，所以良率永远在和物理极限搏斗。
The finest lines are only a few nanometers, so one dust grain is a 'mountain' that breaks a wire. Even with heavy filtration, residual molecules and the statistical fluctuations of lithography leave a few defects, so yield always fights the physical limit.
难度 专业 · 适合 大众
CC BY 4.0 · 已核验 · Verified 2026-10-03
来源 · Source
S. M. Sze 与 Kwok K. Ng 著《Physics of Semiconductor Devices》（半导体器件物理）
S. M. Sze & Kwok K. Ng, Physics of Semiconductor Devices
独立核验依据 · Independent verification: 核验依据 1 ISBN 9780470068328
#无尘室 #缺陷 #良率
FinFET 把晶体管做成“鱼鳍”一样立起来，是为了解决平面晶体管的什么物理困境？
FinFETs stand the transistor up like a fin — what planar-transistor problem does that solve?
平面晶体管缩到很小后，“关不掉”的漏电流和难以控制的阈值电压成了大麻烦。把导电沟道立成三维鳍片，能从三面同时“夹住”它，关得更干净、漏电更少。
As planar transistors shrank, hard-to-switch-off leakage and poorly controlled threshold voltages became severe. A 3D fin lets the gate wrap three sides, turning the channel off more completely and cutting leakage.
难度 专业 · 适合 大众
CC BY 4.0 · 已核验 · Verified 2026-11-05
来源 · Source
Hisamoto, Lee, Kedzierski 等,《FinFET-a self-aligned double-gate MOSFET scalable to 20 nm》,IEEE Transactions on Electron Devices,2000 (DOI: 10.1109/16.887014)
Hisamoto, Lee, Kedzierski et al., 'FinFET-a self-aligned double-gate MOSFET scalable to 20 nm', IEEE Transactions on Electron Devices, 2000, DOI: 10.1109/16.887014
独立核验依据 · Independent verification: 核验依据 1 Crossref DOI 10.1109/16.887014; IEEE Trans. Electron Dev
#FinFET #漏电流 #三维晶体管
当晶体管进入 2 纳米节点，隧穿与热噪声如何模糊“0/1”？
At the 2-nm node, how do tunneling and thermal noise blur the 0/1 boundary?
在原子尺度，源漏间势垒薄到电子靠量子隧穿直接穿过（关不断），且热涨落让阈值电压抖动，逻辑“0/1”边界模糊，需要概率计算或新器件范式应对。
At atomic scale the source-drain barrier is so thin electrons tunnel straight through (can't switch off) and thermal noise jitters the threshold, blurring the 0/1 boundary and pushing toward probabilistic or new device paradigms.
难度 专业 · 适合 小学高段(9-12)
CC BY 4.0 · 已核验 · Verified 2026-11-03
来源 · Source
Taur 与 Ning，《现代 VLSI 器件基础》（第2版）
Taur & Ning, 'Fundamentals of Modern VLSI Devices' (2nd ed.)
独立核验依据 · Independent verification: 核验依据 1 OPENLIBRARY 标识 /works/OL21056819W：Fundamentals of Modern
#2纳米 #隧穿 #热噪声
纯硅在接近绝对零度时几乎不导电，为什么温度一升高它的导电能力就迅速变强？
Pure silicon barely conducts near absolute zero, so why does its conductivity rise quickly as temperature increases?
纯半导体里几乎没有自由载流子，但温度升高会不断把价带电子激发越过约 1.1 eV 的带隙进入导带，同时留下带正电的空穴。载流子数量随温度呈指数增长，所以导电性急剧增强——这与金属恰好相反。
An intrinsic semiconductor has almost no free carriers, but heating continually excites electrons across its ~1.1 eV band gap into the conduction band, leaving positively charged holes. The carrier number grows exponentially with temperature, so conductivity rises sharply—the opposite of what metals do.
难度 进阶 · 适合 初中(12-15)
CC BY 4.0 · 已核验 · Verified 2026-10-03
来源 · Source
S. M. Sze & K. K. Ng,《Physics of Semiconductor Devices》(第3版),第1章(载流子浓度)
S. M. Sze & K. K. Ng, 'Physics of Semiconductor Devices' (3rd ed.), Ch.1 (Carrier concentration)
独立核验依据 · Independent verification: 核验依据 1 ISBN 9780470068328
#本征激发 #载流子 #温度依赖
硅的禁带宽度大约 1.1 电子伏特，这个数值决定了芯片怕不怕热？
Silicon's band gap is about 1.1 eV — does that number decide how much heat a chip can tolerate?
禁带是电子从“被绑住”到“能自由导电”要跨过的能量门槛。室温下热运动很难把电子推过去，所以硅是半导体；温度太高时大量电子被热“吵醒”乱跑，芯片就会漏电、失控。
The band gap is the energy an electron needs to break free and conduct. At room temperature thermal energy rarely bridges it, so silicon stays semiconducting; too much heat excites many electrons and the chip leaks and misbehaves.
难度 进阶 · 适合 小学高段(9-12)
CC BY 4.0 · 已核验 · Verified 2026-10-03
来源 · Source
S. M. Sze 与 Kwok K. Ng 著《Physics of Semiconductor Devices》（半导体器件物理）
S. M. Sze & Kwok K. Ng, Physics of Semiconductor Devices
独立核验依据 · Independent verification: 核验依据 1 ISBN 9780470068328
#禁带 #能带 #热激发
PN结为什么在正向偏置时电流大增、反向偏置时几乎截止——二极管整流靠的就是它？
Why does a p–n junction pass large current under forward bias but nearly block it in reverse—is this how a diode rectifies?
两者接触处形成内建电场和耗尽层。正向偏置削弱内建场、缩小耗尽层，多数载流子得以顺畅通过；反向偏置则加宽耗尽层、几乎堵死电流。这种单向导通正是二极管把交流整成直流的物理基础。
At the junction an internal electric field and depletion region form. Forward bias weakens that field and narrows the region, letting majority carriers flow; reverse bias widens it and nearly blocks current. This one-way conduction is exactly how a diode rectifies AC into DC.
难度 进阶 · 适合 小学高段(9-12)
CC BY 4.0 · 已核验 · Verified 2026-10-04
来源 · Source
W. Shockley,《The Theory of p-n Junctions in Semiconductors and p-n Junction Transistors》,Bell System Technical Journal 28,435–489(1949)
W. Shockley, 'The Theory of p-n Junctions in Semiconductors and p-n Junction Transistors', Bell System Technical Journal 28, 435–489 (1949)
独立核验依据 · Independent verification: 核验依据 1 DOI 10.1515/energyo.0113.00001
#PN结 #内建电场 #整流
摩尔定律碰到的“漏电流”问题怎么解？
How is the leakage-current problem of Moore's law solved?
当栅极太薄，量子隧穿让关断的晶体管仍漏电。业界改用高介电常数材料（High-k）和高深宽比结构（FinFET、GAA）增强控制、降低漏电。
Thin gates let tunneling leak current even when off. Industry uses high-k dielectrics and tall structures (FinFET, GAA) to regain control and cut leakage.
难度 进阶 · 适合 大众
CC BY 4.0 · 已核验 · Verified 2026-11-03
来源 · Source
Taur 与 Ning，《现代 VLSI 器件基础》（第2版）
Taur & Ning, 'Fundamentals of Modern VLSI Devices' (2nd ed.)
独立核验依据 · Independent verification: 核验依据 1 OPENLIBRARY 标识 /works/OL21056819W：Fundamentals of Modern
#漏电流 #High-k #FinFET
为什么用沙子（二氧化硅）能做出芯片，但普通沙子不能直接变成电路？
Sand is silicon dioxide — why can it become a chip, yet ordinary sand can't directly become a circuit?
沙子主要是二氧化硅，要先提炼成高纯度的单质硅，再做成完美排列的单晶硅棒，切成薄片。之后还要一遍遍掺杂、光刻，才能长出能开关的晶体管。
Sand is mostly silicon dioxide; it must first be purified into elemental silicon, grown into flawless single-crystal ingots, sliced into wafers, then doped and patterned many times before transistors exist.
难度 进阶 · 适合 小学低段(6-8)
CC BY 4.0 · 已核验 · Verified 2026-10-03
来源 · Source
S. M. Sze 与 Kwok K. Ng 著《Physics of Semiconductor Devices》（半导体器件物理）
S. M. Sze & Kwok K. Ng, Physics of Semiconductor Devices
独立核验依据 · Independent verification: 核验依据 1 ISBN 9780470068328
#硅 #提纯 #单晶
为什么芯片越先进，工厂里用到的“光”波长反而越短？
Why does a more advanced chip require shorter-wavelength 'light' in the factory?
光刻是用光把电路图案“印”到硅片上，光波长越短，能分辨的线条就越细。所以越先进的工艺要用紫外光、甚至极紫外光，而不是普通的可见光。
Photolithography prints the circuit pattern with light; shorter wavelengths resolve finer lines. That's why cutting-edge processes use UV and even extreme-UV instead of ordinary visible light.
难度 进阶 · 适合 小学低段(6-8)
CC BY 4.0 · 已核验 · Verified 2026-10-03
来源 · Source
S. M. Sze 与 Kwok K. Ng 著《Physics of Semiconductor Devices》（半导体器件物理）
S. M. Sze & Kwok K. Ng, Physics of Semiconductor Devices
独立核验依据 · Independent verification: 核验依据 1 ISBN 9780470068328
#光刻 #波长 #分辨
PN 结为什么能在没有外加电压时，自己挡住电流流过？
Why does a PN junction block current on its own, with no voltage applied?
把带多余电子的 N 型和带多余空穴的 P 型半导体拼在一起，交界面会互相“中和”，形成一段几乎没有载流子的“耗尽区”，并自带一个内建电场。这个电场正好把想穿过去的电子和空穴挡了回去。
Joining N-type (extra electrons) and P-type (extra holes) creates a depletion region with almost no carriers and a built-in electric field, which pushes both electrons and holes back and blocks current.
难度 进阶 · 适合 大众
CC BY 4.0 · 已核验 · Verified 2026-10-03
来源 · Source
S. M. Sze 与 Kwok K. Ng 著《Physics of Semiconductor Devices》（半导体器件物理）
S. M. Sze & Kwok K. Ng, Physics of Semiconductor Devices
独立核验依据 · Independent verification: 核验依据 1 ISBN 9780470068328
#PN结 #耗尽区 #内建电场
为什么芯片越做越小却越来越难？
Why do smaller chips get harder to make?
当晶体管尺寸逼近几纳米，量子隧穿会让电流“漏”过本应关闭的开关，漏电和发热剧增，于是需要新结构（如鳍式、环绕栅）和材料来续命。
Near a few nanometers, quantum tunneling lets current leak through switches that should be off, raising heat and waste, so new structures like FinFET and gate-all-around are needed.
难度 进阶 · 适合 大众
CC BY 4.0 · 已核验 · Verified 2026-10-04 · 2 条独立证据
来源 · Source
Kittel，《固体物理导论》（第8版）
Kittel, 'Introduction to Solid State Physics' (8th ed.)
独立核验依据 · Independent verification: 核验依据 1 ISBN 9780471490241 (2005) · 核验依据 2 ISBN 9780030839931 (2022)
#隧穿 #纳米 #芯片极限
芯片的“摩尔定律”说的是什么？
What does Moore's law about chips say?
它观察到一个趋势：约每隔两年，同样大小的芯片上能塞进的晶体管数翻一倍，让电脑越来越便宜又快。
It observes a trend: roughly every two years the number of transistors on a chip of the same size doubles, making computers cheaper and faster.
难度 入门 · 适合 小学低段(6-8)
CC BY 4.0 · 已核验 · Verified 2026-11-03
来源 · Source
Moore，《把更多元件塞进集成电路》，Electronics 38 (1965)
Moore, 'Cramming More Components onto Integrated Circuits', Electronics 38 (1965)
独立核验依据 · Independent verification: 核验依据 1 OPENLIBRARY 标识 /works/OL13379258W：Cramming more componen
#摩尔定律 #芯片 #晶体管
为什么手机芯片满载时会烫到将近 100℃，而室温才 25℃？
Why can a phone chip hit nearly 100°C under load when the room is only 25°C?
几十亿个晶体管每秒开关几十亿次，每一次开关都要耗一点电、变成一点热。芯片面积很小，热量集中，功率密度比电炉丝还高，所以局部温度能升得很高。
Tens of billions of transistors switch billions of times per second, each switch dissipating a bit of power as heat. The chip is tiny, so that power is concentrated into a density hotter than a stove element.
难度 入门 · 适合 初中(12-15)
CC BY 4.0 · 已核验 · Verified 2026-10-03
来源 · Source
S. M. Sze 与 Kwok K. Ng 著《Physics of Semiconductor Devices》（半导体器件物理）
S. M. Sze & Kwok K. Ng, Physics of Semiconductor Devices
独立核验依据 · Independent verification: 核验依据 1 ISBN 9780470068328
#功率密度 #发热 #芯片
硅为什么是半导体——既不像铜那样随便导电，也不像橡胶那样完全绝缘？
Why is silicon a semiconductor—neither conducting freely like copper nor insulating completely like rubber?
铜这类金属的导带本身未填满，电子不必越过任何能隙就能导电；橡胶等绝缘体的能隙宽达数电子伏，室温下几乎没有电子越得过去。硅的价带与导带之间只隔约 1.1 eV，室温热运动就能把少量电子送过去，导电能力因此介于两者之间。正因这道“适中”的能隙，掺杂、光照或外加电场都能大幅改变硅的载流子数目，使其导电性可被精细调控。
In a metal like copper the conduction band is only partly filled, so electrons conduct without crossing any gap at all; in an insulator such as rubber the gap is several electron-volts wide and essentially no electron can cross it at room temperature. Silicon's valence and conduction bands are separated by only about 1.1 eV, so ordinary thermal energy lifts a small number of electrons across, putting its conductivity in between. Because that gap is 'moderate', doping, illumination or an applied field can change silicon's carrier number drastically, making its conductivity finely controllable.
难度 入门 · 适合 初中(12-15)
CC BY 4.0 · 已核验 · Verified 2026-10-03
来源 · Source
S. M. Sze & K. K. Ng,《Physics of Semiconductor Devices》(第3版),第1章(能带与载流子)
S. M. Sze & K. K. Ng, 'Physics of Semiconductor Devices' (3rd ed.), Ch.1 (Band model and carriers)
独立核验依据 · Independent verification: 核验依据 1 ISBN 9780470068328
#带隙 #本征半导体 #导电性
为什么芯片工作时产生的热，主要不是来自“电流摩擦”而是来自开关损耗？
Why is a chip's heat mostly from switching loss rather than 'current friction'?
导线里的电阻损耗只是小部分；更主要是每次晶体管翻转，都要给栅极电容充放电，这部分电能最终变成热。开关越频繁、晶体管越多，这种损耗越大。
Resistive loss in wires is minor; the big term is charging and discharging gate capacitance on every flip, which ends as heat. More switches per second and more transistors mean more of this loss.
难度 入门 · 适合 大众
CC BY 4.0 · 已核验 · Verified 2026-10-03
来源 · Source
S. M. Sze 与 Kwok K. Ng 著《Physics of Semiconductor Devices》（半导体器件物理）
S. M. Sze & Kwok K. Ng, Physics of Semiconductor Devices
独立核验依据 · Independent verification: 核验依据 1 ISBN 9780470068328
#开关损耗 #电容 #发热
芯片里的“沙子”怎么变成大脑？
How does the sand in a chip become a brain?
沙子提炼出硅，做成能控制电流开关的晶体管，几十亿个晶体管排成电路，就成了处理器。
Sand yields silicon, shaped into transistors that switch current; billions wired together form a processor.
难度 入门 · 适合 小学低段(6-8)
CC BY 4.0 · 已核验 · Verified 2026-10-04 · 2 条独立证据
来源 · Source
Kittel，《固体物理导论》（第8版）
Kittel, 'Introduction to Solid State Physics' (8th ed.)
独立核验依据 · Independent verification: 核验依据 1 ISBN 9780471490241 (2005) · 核验依据 2 ISBN 9780030839931 (2022)
#半导体 #芯片 #晶体管
芯片工厂为什么连一粒灰尘都怕？
Why are chip factories afraid of even a single speck of dust?
因为现在最细的电路线比灰尘还细，一粒灰尘落到硅片上，就可能让一根“电线”断掉或短路。所以工厂要在比手术室还干净的无尘室里造芯片。
Today's finest circuit lines are thinner than dust, so one speck landing on the wafer can break or short a 'wire'. That's why chips are made in cleanrooms cleaner than operating theaters.
难度 入门 · 适合 幼儿(3-6)
CC BY 4.0 · 已核验 · Verified 2026-10-03
来源 · Source
S. M. Sze 与 Kwok K. Ng 著《Physics of Semiconductor Devices》（半导体器件物理）
S. M. Sze & Kwok K. Ng, Physics of Semiconductor Devices
独立核验依据 · Independent verification: 核验依据 1 ISBN 9780470068328
#半导体 #无尘室 #芯片
掺了磷或硼的硅，为什么会多出“自由”的电子或空穴？
Why does silicon doped with phosphorus or boron gain free electrons or holes?
磷原子有五个价电子，放进硅里会多出一个“闲着”的电子，容易到处跑，叫 N 型。硼只有三个价电子，留下一个缺电子的“空穴”，别的电子可以补进来，等效于空穴在移动，叫 P 型。
Phosphorus has five valence electrons, leaving one loosely bound 'extra' electron free to move (N-type). Boron has three, leaving a hole that other electrons fill, so the hole appears to move (P-type).
难度 入门 · 适合 大众
CC BY 4.0 · 已核验 · Verified 2026-10-03
来源 · Source
S. M. Sze 与 Kwok K. Ng 著《Physics of Semiconductor Devices》（半导体器件物理）
S. M. Sze & Kwok K. Ng, Physics of Semiconductor Devices
独立核验依据 · Independent verification: 核验依据 1 ISBN 9780470068328
#掺杂 #空穴 #载流子